#ifndef _FSMC_SRAM_INIT_H_
#define _FSMC_SRAM_INIT_H_
#include "device_resource.h"
#include "stm32f4xx.h"
// -------------------------- FSMC关键参数定义 --------------------------
// 1. SRAM映射地址（FSMC_NE2对应Bank1 Zone3，地址范围：0x68000000 ）
#define FSMC_SRAM_BASE_ADDR ((uint32_t)0x68000000) // SRAM起始映射地址
// #define FSMC_SRAM_MAX_ADDR ((uint32_t)0x67FFFFFF)  // SRAM结束映射地址
#define FSMC_SRAM_SIZE \
  (0x80000) // IS61WV25616容量：256K×16 = 512KB（0x80000字节）

// 2. 读写指针定义（16位数据操作，直接映射到SRAM地址）
#define FSMC_SRAM_PTR    ((volatile uint16_t *)FSMC_SRAM_BASE_ADDR)
#define FSMC_SRAM_PTR_U8 ((volatile uint8_t *)FSMC_SRAM_BASE_ADDR)
// -------------------------- 函数声明 --------------------------
int FSMC_SRAM_Init(void); // FSMC+GPIO初始化
void FSMC_SRAM_Write(uint32_t addr,
                     uint16_t data);    // 写入16位数据（addr：0~0x7FFFF）
uint16_t FSMC_SRAM_Read(uint32_t addr); // 读取16位数据（addr：0~0x7FFFF）
void FSMC_SRAM_WriteBuffer(uint32_t start_addr, uint16_t *buf,
                           uint32_t len); // 批量写
void FSMC_SRAM_ReadBuffer(uint32_t start_addr, uint16_t *buf,
                          uint32_t len); // 批量读

void sram_write(void *dst, void *src, uint32_t n);
void sram_read(void *dst, void *src, uint32_t n);

void sram_write16(void *dst, void *src, uint32_t len16);
void sram_read16(void *dst, void *src, uint32_t len16);
/* ===================================================================
 * 1. 背景填充：0x00 00 01 00 02 00 … FF 00 (512 KB total)
 * =================================================================== */

static void sram_fill_bg(void);

/* ===================================================================
 * 2. 256-byte block test: replace with 0xFFFF, verify no overlay
 * =================================================================== */
static uint8_t sram_256b_check(void);

/* ===================================================================
 * 3. 238-byte block test: replace with 0x0000, verify no overlay
 * =================================================================== */
static uint8_t sram_238b_check(void);
/* ===================================================================
 * 4. One-shot entry point
 * =================================================================== */
int sram_512k_check(void);

/////////////rs485 communication/////////////

#define COM1_RB_POOL_LENTH                    256
#define RECEIVE_BUFFER_LENTH                  128
#define SEND_BUFFER_LENTH                     16
#define CTRL_QUEUE_BUFFER_LENTH               3072
#define MQTT_BUFFER_LENTH                     2048
#define MQTT_MEG_MAX_LENTH                    1920 //2048 - 128
#define MQTT_TOPIC_MAX_LENTH                  128
#define SUBSCRIBE_MAIN_TOPIC_LENTH            1024
#define CJSON_STATIC_POOL_SIZE                4096
#define MQTT_PUB_MSG_SWAP_PUSH_TO_QUEUE_SIZE  1024
#define MQTT_PUB_MSG_SWAP_PUSH_TO_SERVER_SIZE 1024
#define MQTT_PUB_MSG_QUEUE_POOL_SIZE          10240
#define MQTT_OTA_PROCESS_INFO_SIZE            256
#define READ_FROM_SPI_FLASH_BUFER_SIZE        1024
#define MODBUS_READ_RESPONSE_SWAP_BUF_SIZE    145
#define TELNET_RXBUF_SIZE                     128
#define PARAMTER_SETTING_SIZE                 sizeof(struct ParameterStoreDPT)
#define NET_ETH_SETTING_SIZE                  sizeof(NetworkConfig)
#define CLI_OUTPUT_SIZE                       1024
#define LOG_OUTPUT_PUSH_SIZE                  1024
#define LOG_OUTPUT_QUEUE_SIZE                 8196
#define LOG_OUTPUT_PULL_SIZE                  1024
#define UINT_STATUS_POOL_SIZE                 1408

// 计算累计偏移量（从基地址开始的偏移）
#define OFFSET_0  0 // 第一个缓存的偏移
#define OFFSET_1  (OFFSET_0 + COM1_RB_POOL_LENTH)
#define OFFSET_2  (OFFSET_1 + RECEIVE_BUFFER_LENTH)
#define OFFSET_3  (OFFSET_2 + SEND_BUFFER_LENTH)
#define OFFSET_4  (OFFSET_3 + CTRL_QUEUE_BUFFER_LENTH)
#define OFFSET_5  (OFFSET_4 + MQTT_BUFFER_LENTH)
#define OFFSET_6  (OFFSET_5 + MQTT_MEG_MAX_LENTH)
#define OFFSET_7  (OFFSET_6 + MQTT_TOPIC_MAX_LENTH)
#define OFFSET_8  (OFFSET_7 + SUBSCRIBE_MAIN_TOPIC_LENTH)
#define OFFSET_9  (OFFSET_8 + CJSON_STATIC_POOL_SIZE)
#define OFFSET_10 (OFFSET_9 + MQTT_PUB_MSG_SWAP_PUSH_TO_QUEUE_SIZE)
#define OFFSET_11 (OFFSET_10 + MQTT_PUB_MSG_SWAP_PUSH_TO_SERVER_SIZE)
#define OFFSET_12 (OFFSET_11 + MQTT_PUB_MSG_QUEUE_POOL_SIZE)
#define OFFSET_13 (OFFSET_12 + MQTT_OTA_PROCESS_INFO_SIZE)
#define OFFSET_14 (OFFSET_13 + READ_FROM_SPI_FLASH_BUFER_SIZE)
#define OFFSET_15 (OFFSET_14 + MODBUS_READ_RESPONSE_SWAP_BUF_SIZE)
#define OFFSET_16 (OFFSET_15 + TELNET_RXBUF_SIZE)
#define OFFSET_17 (OFFSET_16 + PARAMTER_SETTING_SIZE)
#define OFFSET_18 (OFFSET_17 + NET_ETH_SETTING_SIZE)
#define OFFSET_19 (OFFSET_18 + CLI_OUTPUT_SIZE)
#define OFFSET_20 (OFFSET_19 + LOG_OUTPUT_PUSH_SIZE)
#define OFFSET_21 (OFFSET_20 + LOG_OUTPUT_QUEUE_SIZE)
#define OFFSET_22 (OFFSET_21 + LOG_OUTPUT_PULL_SIZE)
#define OFFSET_23 (OFFSET_22 + UINT_STATUS_POOL_SIZE)

// 新增缓存的偏移（自动基于上一个）
// #define OFFSET_6 (OFFSET_5 + LOG_BUFFER_LENTH)

// 定义各缓存的地址（基地址 + 偏移量）
#define COM1_RB_POOL      ((uint8_t *)(FSMC_SRAM_BASE_ADDR + OFFSET_0))
#define RECEIVE_BYTES     ((uint8_t *)(FSMC_SRAM_BASE_ADDR + OFFSET_1))
#define SEND_BYTES        ((uint8_t *)(FSMC_SRAM_BASE_ADDR + OFFSET_2))
#define CTRL_QUEUE_BUFFER ((uint8_t *)(FSMC_SRAM_BASE_ADDR + OFFSET_3))
#define MQTT_BUFFER       ((uint8_t *)(FSMC_SRAM_BASE_ADDR + OFFSET_4))

#define MQTT_REC_MSG   ((uint8_t *)(FSMC_SRAM_BASE_ADDR + OFFSET_5))
#define MQTT_REC_TOPIC ((uint8_t *)(FSMC_SRAM_BASE_ADDR + OFFSET_6))

#define MQTT_SUBSCRIBE_TOPIC ((uint8_t *)(FSMC_SRAM_BASE_ADDR + OFFSET_7))
#define CJSON_STATIC_POOL    ((uint8_t *)(FSMC_SRAM_BASE_ADDR + OFFSET_8))

#define MQTT_PUB_MSG_SWAP_PUSH_TO_QUEUE  ((uint8_t *)(FSMC_SRAM_BASE_ADDR + OFFSET_9))
#define MQTT_PUB_MSG_SWAP_PUSH_TO_SERVER ((uint8_t *)(FSMC_SRAM_BASE_ADDR + OFFSET_10))
#define MQTT_PUB_MSG_QUEUE_POOL          ((uint8_t *)(FSMC_SRAM_BASE_ADDR + OFFSET_11))

#define MQTT_OTA_PROCESS_INFO         ((uint8_t *)(FSMC_SRAM_BASE_ADDR + OFFSET_12))
#define READ_FROM_SPI_BUFFER          ((uint8_t *)(FSMC_SRAM_BASE_ADDR + OFFSET_13))
#define MODBUS_READ_RESPONSE_SWAP_BUF ((uint8_t *)(FSMC_SRAM_BASE_ADDR + OFFSET_14))
#define TELNET_RXBUF_POOL             ((uint8_t *)(FSMC_SRAM_BASE_ADDR + OFFSET_15))
#define PARA_SETT_BEG_ADDR            ((uint8_t *)(FSMC_SRAM_BASE_ADDR + OFFSET_16))
#define NET_ETH_SETT_BEG_ADDR         ((uint8_t *)(FSMC_SRAM_BASE_ADDR + OFFSET_17))
#define CLI_OUTPUT_BEG_ADDR           ((uint8_t *)(FSMC_SRAM_BASE_ADDR + OFFSET_18))
#define LOG_PUSH_DATA_BEG_ADDR        ((uint8_t *)(FSMC_SRAM_BASE_ADDR + OFFSET_19))
#define LOG_OUTPUT_QUEUE_BEG_ADDR     ((uint8_t *)(FSMC_SRAM_BASE_ADDR + OFFSET_20))
#define LOG_PULL_DATA_BEG_ADDR        ((uint8_t *)(FSMC_SRAM_BASE_ADDR + OFFSET_21))
#define UINT_STATUS_POOL              ((uint8_t *)(FSMC_SRAM_BASE_ADDR + OFFSET_22))

#endif
